Footing Removal in Cut-Metal Process
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Chi Huang, Kuo-Bin Huang, Ying-Liang Chuang, Ming-Hsi Yeh
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Abstract
A method includes forming a gate stack, which includes a first portion over a portion of a first semiconductor fin, a second portion over a portion of a second semiconductor fin, and a third portion connecting the first portion to the second portion. An anisotropic etching is performed on the third portion of the gate stack to form an opening between the first portion and the second portion. A footing portion of the third portion remains after the anisotropic etching. The method further includes performing an isotropic etching to remove a metal gate portion of the footing portion, and filling the opening with a dielectric material.
Claims20
A method comprising:
- forming a gate stack comprising:
- a first portion over a portion of a first semiconductor fin;
- a second portion over a portion of a second semiconductor fin;
- and
- a third portion connecting the first portion to the second portion;
- performing an anisotropic etching on the third portion of the gate stack to form an opening between the first portion and the second portion, wherein a footing portion of the third portion remains after the anisotropic etching;
- performing an isotropic etching to remove a metal gate portion of the footing portion;
- and
- filling the opening with a dielectric material.
A method comprising:
- forming a gate stack between a first gate spacer and a second gate spacer, the gate stack comprising:
- a gate dielectric;
- and
- a metal electrode over the gate dielectric;
- etching a first portion of the gate stack to expose sidewalls of the first gate spacer and the second gate spacer;
- depositing a polymer layer on the sidewalls of the first gate spacer and a second gate spacer;
- thinning the polymer layer to expose a footing portion of the gate stack, wherein the footing portion is overlapped by a portion of the first gate spacer;
- and
- etching a remaining portion of the metal electrode in the footing portion.
A method comprising:
- forming a gate stack comprising a gate dielectric, and a gate electrode over the gate dielectric, wherein each of the gate dielectric and the gate electrode comprises:
- a first portion over a portion of a first semiconductor fin;
- a second portion over a portion of a second semiconductor fin;
- and
- a third portion connecting the first portion to the second portion;
- etching the third portion of the gate electrode to electrically disconnect the first portion of the gate electrode from the second portion of the gate electrode, wherein the third portion of the gate dielectric comprises a remaining portion after the etching, and wherein the first portion of the gate dielectric is physically connected to the second portion of the gate dielectric;
- and
- filling an opening left by the third portion of the gate electrode with a dielectric material.
Dependencies are inferred from the claim text.