Middle-of-line shielded gate for integrated circuits
AssigneeQUALCOMM Incorporated
InventorsLixin GE, Bin YANG, Ye LU, Junjing BAO, Periannan CHIDAMBARAM
Life of this patent
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Abstract
Middle-of-line (MOL) shielded gate in integrated circuits (ICs) are disclosed. One or more metal resistors are fabricated in a MOL layer in the IC to reduce gate to drain parasitic capacitance in the semiconductor area. By fabricating a metal resistor in the MOL layer, the metal resistor can be localized close to semiconductor devices to more effectively reduce parasitic capacitance of the semiconductor devices without adding costs or defects to the current fabrication processes. The current fabrication processes may be used to create contacts in the MOL to fabricate the metal resistor.
Claims13
A middle-of-line (MOL) shielded gate for an integrated circuit (IC), comprising:
- an active semiconductor layer comprising a first semiconductor device;
- a metal resistor disposed in an MOL layer of the IC, the MOL layer disposed above the active semiconductor layer;
- a contact disposed above the metal resistor and adjacent to the active semiconductor layer in the MOL layer, the contact electrically coupled to a contact area of the metal resistor;
- and
- an interconnect disposed in an interconnect layer of the IC above the MOL layer, the interconnect layer electrically coupled to the contact to electrically couple the interconnect to the contact area of the metal resistor,
- wherein the first semiconductor device comprises a transistor comprising a source, a drain, and a gate interdisposed between the source and the drain, and
- wherein the metal resistor is disposed over the gate of the transistor.
(canceled)
A middle-of-line (MOL) shielded gate for an integrated circuit (IC), comprising:
- means for forming an active semiconductor layer including a first semiconductor device;
- and
- means for forming a MOL layer including a metal resistor above the means for providing the active semiconductor, wherein the first semiconductor device comprises a transistor comprising a source, a drain, and a gate interdisposed between the source and the drain, and wherein the metal resistor is disposed over the gate of the transistor.
13-22. (canceled)
Dependencies are inferred from the claim text.