Bidirectional shift register units, bidirectional shift registers, and display panels

A bidirectional shift register, comprising a plurality of shift register units serially connected, wherein the shift register unit is configured with:

• a pull-up circuit configured to transform first clock signals into scanning signals outputting at a current level;
• a pull-up control circuit configured with a forward pull-up sub-circuit and a backward pull-up sub-circuit, wherein the forward pull-up sub-circuit is configured to pull up a potential of a control end of the pull-up circuit when a forward scanning process is conducted, and the backward pull-up sub-circuit is configured to pull up the potential of the control end of the pull-up circuit when a backward scanning process is conducted;
• a pull-down circuit configured to pull down the potential of the control end of the pull-up circuit and the scanning signals outputting at the current level during a pull-down phase;
• a pull-down maintaining circuit configured to continuously pull down the potential of the control end of the pull-up circuit and the scanning signals outputting at the current level during the pull-down phase;
• wherein a number of the first clock signals is configured to be m, first control signals of the register units located prior to (m+1)-th level is configured to be first initial signals (STV_F), fourth control signals of the register units located prior to the (m+1)-th level is configured to be second initial signals (STV_R);
• and
• second control signals of the register units located behind (m−1)-th level is configured to be the second initial signals (STV_R), third control signals of the register units located behind the (m−1)-th is configured to be first initial signals (STV_F).

A display panel, comprising a bidirectional shift register configured with a plurality of bidirectional shift register units serially connected, wherein the bidirectional shift register unit comprises:

• a pull-up circuit configured to transform first clock signals into scanning signals outputting at a current level;
• a pull-up control circuit configured with a forward pull-up sub-circuit and a backward pull-up sub-circuit, wherein the forward pull-up sub-circuit is configured to pull up a potential of a control end of the pull-up circuit when a forward scanning process is conducted, and the backward pull-up sub-circuit is configured to pull up the potential of the control end of the pull-up circuit when a backward scanning process is conducted;
• a pull-down circuit configured to pull down the potential of the control end of the pull-up circuit and the scanning signals outputting at the current level during a pull-down phase;
• a pull-down maintaining circuit configured to continuously pull down the potential of the control end of the pull-up circuit and the scanning signals outputting at the current level during the pull-down phase;
• wherein a number of the first clock signals is configured to be m, first control signals of the register units located prior to (m+1)-th level is configured to be first initial signals (STV_F), fourth control signals of the register units located prior to the (m+1)-th level is configured to be second initial signals (STV_R);
• and
• second control signals of the register units located behind (m−1)-th level is configured to be the second initial signals (STV_R), third control signals of the register units located behind the (m−1)-th level is configured to be first initial signals (STV_F).