Preemptive idle time read scans
AssigneeMicron Technology, Inc.
InventorsAshutosh Malshe, Harish Singidi, Kishore Kumar Muchherla, Michael G. Miller, Sampath Ratnam, John Zhang, Jie Zhou
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorsAshutosh Malshe, Harish Singidi, Kishore Kumar Muchherla, Michael G. Miller, Sampath Ratnam, John Zhang, Jie Zhou
Estimating the term…
Devices and techniques for initiating and controlling preemptive idle time read scans in a flash based storage system are disclosed. In an example, a memory device includes a NAND memory array and a memory controller to schedule and initiate read scans among multiple locations of the memory array, with such read scans being preemptively triggered during an idle (background) state of the memory device, thus reducing host latency during read and write operations in an active (foreground) state of the memory device. In an example, the optimization technique includes scheduling a read scan operation, monitoring an active or idle state of host IO operations, and preemptively initiating the read scan operation when entering an idle state, before the read scan operation is scheduled to occur. In further examples, the read scan may preemptively occur based on time-based scheduling, frequency-based conditions, or event-driven conditions triggering the read scan.
A memory device, comprising:
A method for performing preemptive read scans in a memory device, the method comprising a plurality of operations performed by a memory controller upon a NAND memory array of the memory device, with the operations comprising:
The method of claim :16, wherein the scheduled condition is a time determined from a scheduled time interval, and wherein the initiating of the read scan operation preemptively occurs upon entering the idle state during a predetermined time period prior to the scheduled condition.
The method of claim :16, the operations further comprising:
A device readable storage medium, that provides instructions that, when executed by a memory controller of a memory device, perform preemptive read scans on a NAND memory array of the memory device, wherein the instructions cause the controller to perform operations comprising:
Dependencies are inferred from the claim text.