Memory system that supports dual-mode modulation
AssigneeMicron Technology, Inc.
InventorsRobert Nasry Hasbun, Timothy M. Hollis, Jeffrey P. Wright, Dean D. Gans
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Abstract
Methods, systems, and devices that supports dual-mode modulation in the context of memory access are described. A system may include a memory array coupled with a buffer, and a multiplexer may be coupled with the buffer, where the multiplexer may be configured to output a bit pair representative of data stored within the memory array. The multiplexer may also be coupled with a driver, where the driver may be configured to generate a symbol representative of the bit pair that is output by the multiplexer.
Claims25
A system, comprising:
- a memory array coupled with a buffer;
- a multiplexer coupled with the buffer, the multiplexer configured to output a bit pair, the bit pair representative of data stored within the memory array;
- and
- a driver coupled with the multiplexer, the driver configured to generate a symbol representative of the bit pair representative of data stored within the memory array that is output by the multiplexer.
A system, comprising:
- a memory array coupled with a plurality of output circuits, wherein each output circuit comprises:
- a first buffer and a second buffer;
- a multiplexer coupled with the first buffer and the second buffer, the multiplexer configured to output a bit group comprising at least two bits representative of data stored within the memory array;
- a driver coupled with the multiplexer, the driver configured to generate a symbol representative of the bit group representative of data stored within the memory array that is output by the multiplexer.
A memory apparatus, comprising:
- a memory array coupled with a plurality of output circuits, wherein each output circuit comprises a buffer, a multiplexer coupled with the buffer, and a driver coupled with the multiplexer;
- and
- a controller coupled with the memory array and the plurality of output circuits, wherein the controller is operable to:
- determine a first signaling mode for an output circuit of the plurality of output circuits;
- and
- configure the output circuit to generate non-binary symbols that each represent at least two bits representative of data stored in the memory array based at least in part on determining the first signaling mode.
A system, comprising:
- a memory array coupled with a plurality of output circuits, wherein each output circuit comprises:
- a buffer;
- a multiplexer coupled with the buffer, wherein the multiplexer is configured to output at least two types of outputs representative of data stored in the memory array;
- a first driver coupled with the multiplexer, the first driver configured to generate a pulse amplitude modulation (PAM) symbol representing at least two bits when the multiplexer outputs a first output type;
- a second driver coupled with the multiplexer, the second driver configured to generate a PAM symbol representing a single bit when the multiplexer outputs a second output type.
Dependencies are inferred from the claim text.