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US 2019/0102760 A1Published application
Scanning system with direct access to memory
AssigneeSquare, Inc.
InventorsAfshin Rezayee, Mary Kay Bowman, Christopher Rohlf
Life of this patent
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Abstract
A payment terminal has a clock management unit for providing clock signals to components of the payment terminal. The payment terminal also has a wireless communication interface for communicating wireless signals. A processing unit of the payment terminal may monitor clock signals provided by the clock management unit and determine a phase and frequency difference between a clock signal provided to a component producing RF noise and a clock signal provided to a wireless communication interface of the payment terminal. When RF noise present in the received wireless signal falls below a threshold, the processing unit may sample the received wireless signal.
Claims30
A secure transaction processing device including an integrated memory scanning microprocessor, comprising:
- at least one processing unit having an operational processing portion;
- at least one memory having an operational memory portion,
- wherein the operational memory portion comprises application instructions, operating system instructions, and system memory,
- wherein the operating system instructions cause the operational processing portion to execute an operating system on the operational processing portion, and wherein the operating system instructions cause the operational processing portion to update operating system values within the system memory, and
- wherein the application instructions cause the operational processing portion to execute one or more applications on the operational processing portion, and wherein the application instructions cause the operational processing portion to update application values within the system memory;
- and
- a memory scanning microprocessor including a secure processing portion and a secure memory portion,
- wherein the secure processing portion and the secure memory portion are physically and logically protected from tamper attempts,
- wherein the secure processing portion has direct read access to the operational memory portion, and
- wherein the secure memory portion comprises instructions that cause the secure processing portion to:
- access at least a portion of the operating system values via the direct read access,
- access at least a portion of the application values via the direct read access, compare the operating system values and the application values to a plurality of test criteria;
- determine, based on the comparison, that one of the application instructions or the operating system instructions is performing forbidden operations, and
- send a message to an external device via a network stack in the operational memory portion in response to the determination that one of the application instructions or the operating system instructions is performing forbidden operations.
11 more elements
A secure transaction processing device for performing an integrated operational security test, comprising:
- at least one processing unit having an operational processing portion and a secure processing portion;
- and
- at least one memory having an operational memory portion and a secure memory portion, wherein the secure processing portion and the secure memory portion are physically and logically protected from tamper attempts,
- wherein the secure processing portion has direct read access to the operational memory portion,
- wherein the operational memory portion comprises system instructions and system memory,
- wherein the system instructions cause the operational processing portion to execute one or more processes on the secure transaction processing device, and wherein the system instructions cause the operational processing portion to update system values within the system memory, and
- wherein the secure memory portion comprises memory analysis instructions, and wherein the memory analysis instructions cause the secure processing portion to:
- access at least a portion of the system values via the direct read access, compare the accessed system values to corresponding evaluation criteria;
- determine, based on the comparison, whether there is a discrepancy between the system values and the evaluation criteria, and
- initiate a response action based on the determination.
7 more elements
A method of performing a security test at a payment terminal, the method comprising:
- processing information with a processing unit of the payment terminal;
- storing, by the processing unit, the information in memory of the payment terminal;
- providing a direct connection between the memory and a memory scanning system of the payment terminal, the memory scanning system including a secure processing portion and a secure memory portion that are physically and logically protected from tamper attempts;
- scanning, by the memory scanning system, the memory via direct memory access using the direct connection;
- obtaining, by the memory scanning system, at least a portion of the information in the memory based on the scanning;
- comparing, by the memory scanning system, the obtained information to corresponding evaluation criteria stored by the memory scanning system;
- determining, by the memory scanning system, whether there is a discrepancy between the obtained information and the evaluation criteria;
- and
- initiating, by the memory scanning system, a response action in response to the determination of a discrepancy between the obtained information and the evaluation criteria.
6 more elements
Dependencies are inferred from the claim text.