Method and apparatus for detecting side-channel attack
AssigneeBaidu USA LLC
InventorsYueqiang Cheng, Tao Wei
Life of this patent
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Abstract
Embodiments of the present disclosure disclose a method and apparatus for detecting a side channel attack. An embodiment of the method comprises: clearing data in a state save area of a target enclave; sequentially executing an instruction sequence in the target enclave; acquiring data in the state save area; and in response to determining that the acquired data in the state save area indicates that an asynchronous enclave exit with a cause of exception exit happens to the target enclave, determining that the side-channel attack to the target enclave exists. The embodiment implements detecting a side channel attack to the enclave without additional hardware.
Claims20
A method for detecting a side-channel attack, comprising:
- clearing data in a state save area of a target enclave;
- sequentially executing an instruction sequence in the target enclave;
- acquiring data in the state save area;
- and
- in response to determining that the acquired data in the state save area indicates that an asynchronous enclave exit with a cause of exception exit happens to the target enclave, determining that the side-channel attack to the target enclave exists.
An apparatus for detecting a side-channel attack, comprising:
- a clearing unit configured to clear data in a state save area of a target enclave;
- an executing unit configured to sequentially execute an instruction sequence in the target enclave;
- a first acquiring unit configured to acquire data in the state save area;
- and
- a first determining unit configured to, in response to determining that the acquired data in the state save area indicates that an asynchronous enclave exit with a cause of exception exit happens to the target enclave, determine that the side-channel attack to the target enclave exists.
An electronic device, comprising:
- one or more processors;
- and
- a storage storing one or more programs which, when being executed by the one or more processors, cause the one or more processors to:
- clear data in a state save area of a target enclave;
- sequentially execute an instruction sequence in the target enclave;
- acquire data in the state save area;
- and
- in response to determining that the acquired data in the state save area indicates that an asynchronous enclave exit with a cause of exception exit happens to the target enclave, determine that the side-channel attack to the target enclave exists.
A non-transitory computer-readable storage medium having a computer program embodied thereon, wherein the computer program, when being executed by a processor, causes the processor to:
- clear data in a state save area of a target enclave;
- sequentially execute an instruction sequence in the target enclave;
- acquire data in the state save area;
- and
- in response to determining that the acquired data in the state save area indicates that an asynchronous enclave exit with a cause of exception exit happens to the target enclave, determine that the side-channel attack to the target enclave exists.
Dependencies are inferred from the claim text.