Transistor amplifiers having node splitting for loop stability and related methods

A packaged transistor amplifier, comprising:

• a package having an input lead and an output lead;
• an input impedance matching network coupled to the input lead;
• a transistor stage having a plurality of unit cell transistors that are electrically in parallel, the transistor stage coupled to the input impedance matching network, each of the unit cell transistors having an output;
• an output impedance matching network coupled to the transistor stage;
• a plurality of output bond wires coupled between the output impedance matching network and the output lead;
• and
• an output combining node coupled to the outputs of the plurality of unit cell transistors,
• wherein the plurality of output bond wires are coupled between the transistor stage and the output combining node.

A packaged transistor amplifier, comprising:

• a package having an input lead and an output lead;
• one or more circuit substrates within the package, the one or more circuit substrates including a plurality of electrically parallel amplification paths, each of the amplification paths coupled to the input lead and to the output lead;
• and
• a plurality of output bond wires that couple the output lead to at least one of the one or more circuit substrates;
• wherein the output bond wires are between the one or more circuit substrates and a location where all of the electrically parallel amplification paths are first combined together.