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US 2019/0102325 A1Published application
Memory control management of a processor
AssigneeIntel Corporation
InventorsMahesh S. Natu, Murugasamy K. Nachimuthu, Bill Nale
Life of this patent
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Abstract
Systems, apparatuses and methods may provide for technology that conducts a comparison between an identified capability of a memory device and memory usage rules associated with a processor. The memory usage rules are to identify allowed memory accesses by the processor. The technology further limits access by the processor to the memory device based upon the comparison.
Claims24
A system comprising:
- a memory device including a controller and a memory;
- and
- a processor to:
- conduct a comparison between an identified capability of the memory device and memory usage rules associated with the processor, wherein the memory usage rules are to identify allowed memory accesses by the processor;
- and
- limit access by the processor to the memory device based upon the comparison.
3 more elements
A processor comprising:
- a substrate;
- and
- logic coupled to the substrate and implemented at least partly in one or more of configurable logic or fixed-functionality logic hardware, the logic to:
- conduct a comparison between an identified capability of a memory device and memory usage rules associated with the processor, wherein the memory usage rules are to identify allowed memory accesses by the processor;
- and
- limit access by the processor to the memory device based upon the comparison.
3 more elements
A method of memory access, comprising:
- conducting a comparison between an identified capability of a memory device and memory usage rules associated with a processor, wherein the memory usage rules are to identify allowed memory accesses by the processor;
- and
- limiting access by the processor to the memory device based upon the comparison.
At least one computer readable storage medium comprising a set of instructions, which when executed, cause a computing system to:
- compare an identified capability of a memory device to memory usage rules associated with a processor, wherein the memory usage rules are to identify allowed memory accesses by the processor;
- and
- limit access by the processor to the memory device based upon the comparison.
Dependencies are inferred from the claim text.