Redundancy Coding Stripe Based On Coordinated Internal Address Scheme Across Multiple Devices

A method comprising:

• receiving, at each of a plurality of non-volatile storage devices, a plurality of write requests that each comprise an external logical address, the plurality of non-volatile storage devices sharing a common internal logical addressing scheme;
• mapping, at each of the plurality of non-volatile storage devices, the external logical addresses to internal logical addresses in the common internal logical addressing scheme;
• storing the mapping in non-transitory storage in ones of the plurality of non-volatile storage devices;
• and
• composing redundancy coding stripes by a master controller, each of the redundancy coding stripes formed from a chunk of data on each of the plurality of non-volatile storage devices, each of the redundancy coding stripes formed from data having the same internal logical address in the common internal logical addressing scheme.

A system comprising:

• redundancy coding means for composing redundancy coding stripes, the redundancy coding means further for sending write requests to a plurality of non-volatile storage devices to each write a chunk of data of a redundancy coding stripe at the same internal address, each of the write requests having an external logical address;
• communication means for receiving the write requests at the plurality of non-volatile storage devices;
• writing means for writing chunks of a redundancy stripe at the same internal address on each of the plurality of non-volatile storage devices;
• and
• address mapping means for mapping the external logical addresses in the write requests to internal addresses of the plurality of non-volatile storage devices, the address mapping means further for storing the mapping in non-transitory storage.