US 2019/0102229 A1 · DYNAMIC PERFORMANCE BIASING IN A PROCESSOR

Abstract

Technologies are provided in embodiments to dynamically bias performance of logical processors in a core of a processor. One embodiment includes identifying a first logical processor associated with a first thread of an application and a second logical processor associated with a second thread, obtaining first and second thread preference indicators associated with the first and second threads, respectively, computing a first relative performance bias value for the first logical processor based, at least in part, on a relativeness of the first and second thread preference indicators, and adjusting a performance bias of the first logical processor based on the first relative performance bias value. Embodiments can further include increasing the performance bias of the first logical processor based, at least in part, on the first relative performance bias value indicating a first performance preference that is higher than a second performance preference.

Claims25

Dependent claims

An system, the system comprising:

a memory;
and
a processor coupled to the memory, the processor including a first core to:
identify a first logical processor associated with a first thread of an application and a second logical processor associated with a second thread;
obtain first and second thread preference indicators associated with the first and second threads, respectively;
compute a first relative performance bias value for the first logical processor based, at least in part, on a relativeness of the first and second thread preference indicators;
and
adjust a performance bias of the first logical processor based on the first relative performance bias value.

5 more elements

Dependencies are inferred from the claim text.

Dynamic performance biasing in a processor

Life of this patent

Dynamic performance biasing in a processor

Life of this patent

Abstract

Claims25