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US 2019/0102180 A1Published application
Optimizing software-directed instruction replication for gpu error detection
AssigneeNVIDIA Corporation
InventorsSiva Hari, Michael Sullivan, Timothy Tsai, Stephen W. Keckler, Abdulrahman Mahmoud
Life of this patent
Estimating the term…
Abstract
Software-only and software-hardware optimizations to reduce the overhead of intra -thread instruction duplication on a GPU or other instruction processor are disclosed. The optimizations trade off error containment for performance and include ISA extensions with limited hardware changes and area costs.
Claims13
An integrity verifier comprising:
- logic to identify an original instruction in a logic function for a processor, the original instruction writing a first result to a first register;
- logic to duplicate the original instruction into a duplicate instruction and to insert the duplicate instruction in the logic function, the duplicate instruction reading from the same one or more source register as the original instruction and writing a second result to a second register;
- and
- logic to insert into the logic function a branch-free compare instruction that compares, in a single instruction, the first result and the second result and raises an alert if there is a mismatch.
1 more element
An integrity verifier comprising:
- logic to identify an original instruction in a logic function for a processor, the original instruction writing a first result to a first register;
- logic to duplicate the original instruction into a duplicate instruction and to insert the duplicate instruction in the logic function, the duplicate instruction reading from the same one or more source register as the original instruction and writing a second result to a second register;
- logic to accumulate, for a plurality of original instructions and a plurality of duplicate instructions, a difference between the first result and the second result as a signature in a third register;
- and
- logic to insert a branch-free compare instruction at an exit point of the logic function, the branch-free compare instruction raising an alert if the signature does not equal a predetermined initial value.
2 more elements
Dependencies are inferred from the claim text.