Method and apparatus for reducing silent data errors in non-volatile memory systems
AssigneeIntel Corporation
InventorsWei Fang, Kiran Pangal, Prashant S. Damle
Life of this patent
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Abstract
In one embodiment, an apparatus comprises a memory array comprising a plurality of phase change memory (PCM) cells; and a controller to determine to read data stored by the plurality of PCM cells independent of a read command from a host device; and in response to the determination to read data stored by the plurality of PCM cells independent of a read command from a host device, perform a dummy read operation on the plurality of PCM cells and perform an additional read operation on the plurality of PCM cells.
Claims24
An apparatus comprising:
- a memory array comprising a plurality of phase change memory (PCM) cells;
- and
- a controller to:
- determine to read data stored by the plurality of PCM cells independent of a read command from a host device;
- and
- in response to the determination to read data stored by the plurality of PCM cells independent of a read command from a host device:
- perform a dummy read operation on the plurality of PCM cells;
- perform an additional read operation on the plurality of PCM cells;
- perform an error correction operation on data read by the additional read operation;
- and
- write data corrected by the error correction operation into the plurality of PCM cells to overwrite the data read by the additional read operation.
A method comprising:
- determining to read data stored by a plurality of memory cells independent of a read command from a host device;
- and
- in response to determining to read data stored by the plurality of memory cells independent of a read command from a host device:
- performing a dummy read operation on the plurality of memory cells;
- performing an additional read operation on the plurality of memory cells;
- performing an error correction operation on data read by the additional read operation;
- and
- writing data corrected by the error correction operation into the plurality of PCM cells to overwrite the data read by the additional read operation.
A non-transitory machine readable storage medium having instructions stored thereon, the instructions when executed by a machine to cause the machine to:
- determine to read data stored by a plurality of memory cells independent of a read command from a host device;
- and
- in response to the determination to read data stored by the plurality of memory cells independent of a read command from a host device:
- perform a dummy read operation on the plurality of memory cells;
- perform an additional read operation on the plurality of memory cells;
- perform an error correction operation on data read by the additional read operation;
- and
- write data corrected by the error correction operation into the plurality of PCM cells to overwrite the data read by the additional read operation.
A system comprising:
- a controller to:
- determine to read data stored by a plurality of memory cells of an array independent of a read command from a host device;
- and
- in response to the determination to read data stored by the plurality of memory cells of the array independent of a read command from a host device:
- perform a dummy read operation on the plurality of memory cells;
- perform an additional read operation on the plurality of memory cells;
- perform an error correction operation on data read by the additional read operation;
- and
- write data corrected by the error correction operation into the plurality of PCM cells to overwrite the data read by the additional read operation.
Dependencies are inferred from the claim text.