Array substrate, manufacturing method thereof and touch display panel

A manufacturing method of an array substrate, comprising the following steps:

• stacking up a light shielding layer and a buffer layer on a base sequentially, forming a thin film transistor on the buffer layer through patterning process, wherein the thin film transistor comprises a semiconductor layer, a gate insulating layer, a gate, a third insulating layer, and a source/drain stacking up sequentially, the source/drain are electrically connected to the semiconductor layer via a through hole, and forming a connecting wire when forming the source/drain through patterning process;
• forming a planarization layer, a common electrode layer and a first insulating layer on the thin film transistor sequentially;
• forming a touch layer on the first insulating layer through patterning process, wherein the touch layer comprises a plurality of first touch electrodes arranged in matrix and a plurality of second touch electrodes arranged in matrix, the first touch electrodes and the second touch electrodes are disposed alternately, the first touch electrodes are insulating form the second touch electrodes, two adjacent first touch electrodes in each row are electrically connected by a connecting wire, the second touch electrodes in each column are electrically connected;
• forming a second insulating layer and a pixel electrode on the touch layer sequentially through patterning process to make the pixel electrode electrically connect to the source/drain via a through hole.

A touch display panel, comprising a color filter substrate and an array substrate, the color filter substrate disposed opposite to the array substrate, wherein the color filter substrate comprises a black matrix, a projection of the black matrix on a touch layer covers a plurality of first touch electrodes and a plurality of second touch electrodes, the array substrate comprises a base, a thin film transistor disposed on the base, a planarization layer covering the thin film transistor, and the touch layer disposed on a side of the planarization layer away from the thin film transistor, wherein the touch layer comprises:

• the first touch electrodes, arranged in matrix;
• and
• the second touch electrodes, arranged in matrix;
• wherein the first touch electrodes and the second touch electrodes are disposed alternately, the first touch electrodes are insulating form the second touch electrodes, two adjacent first touch electrodes in each row are electrically connected by a connecting wire, the second touch electrodes in each column are electrically connected, and the connecting wire and a source/drain of the thin film transistor are in the same layer and obtained by the same process.