Systems and methods for frequency mode detection and implementation
AssigneeMicron Technology, Inc.
InventorsKallol Mazumder, Parthasarathy Gajapathy
Life of this patent
Estimating the term…
Abstract
The systems and methods provided herein acquire a command over multiple clock cycles and fires it. When a chip select signal (CS) transitions, a first portion of a command address is captured in a first clock cycle after the CS transitions. Then, a second portion of the command address is captured in a second clock cycle immediately after the first clock cycle or in a third clock cycle immediately following the second clock cycle. An internal command is fired, using the first portion of the command address and the second portion of the command address.
Claims20
A tangible, non-transitory, machine-readable medium, comprising machine-readable instructions, that when executed by one or more processors cause the one or more processors to:
- upon a transition of a chip select signal (CS) transition between low and high:
- capture a first portion of a command address in a first clock cycle after the transition;
- and
- capture a second portion of the command address in a second clock cycle immediately after the first clock cycle;
- or
- capture the second portion of the command address in a third clock cycle immediately following the second clock cycle;
- and
- fire an internal command, using the first portion of the command address and the second portion of the command address.
A command interface of a memory device, comprising circuitry, configured to:
- upon a transition of a chip select signal (CS)between low and high:
- capture a first portion of a command address in a first clock cycle after the transition;
- and
- capture a second portion of the command address in a second clock cycle immediately after the first clock cycle;
- or
- capture the second portion of the command address in a third clock cycle immediately following the second clock cycle;
- and
- fire an internal command, using the first portion of the command address and the second portion of the command address.
A method, comprising:
- upon a transition of a chip select signal (CS):
- capturing a first portion of a command address in a first clock cycle after the transition;
- and
- capturing a second portion of the command address in a second clock cycle immediately after the first clock cycle;
- or
- capturing the second portion of the command address in a third clock cycle immediately following the second clock cycle;
- and
- firing an internal command, using the first portion of the command address and the second portion of the command address.
Dependencies are inferred from the claim text.