Stabilized voltage and current reference generator and circuits
AssigneeThe Regents of the Unversity of California
InventorsPatrick Mercier, Hui Wang
Life of this patent
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Abstract
An ultra-low-power voltage reference generator in an integrated CMOS circuit includes a regular MOS transistor reference current source connected to a line voltage and a regular MOS transistor resistor between the regular MOS transistor reference current source and ground. A constant with temperature reference voltage VREF is generated from a terminal inter-connecting the regular MOS transistor reference current source and the regular MOS transistor resistor. An ultra-low-power current reference generator receives a reference voltage and generated ultra-low level current from the reference voltage with a temperature compensated gate-leakage array.
Claims22
An ultra-low-power voltage reference generator in an integrated CMOS circuit, the voltage regulator comprising a regular MOS transistor reference current source connected to a line voltage and a regular MOS transistor resistor between the regular MOS transistor reference current source and ground, wherein a constant with temperature reference voltage VREF is generated from a terminal inter-connecting the regular MOS transistor reference current source and the regular MOS transistor resistor.
20-28. (canceled)
A method for generating a reference voltage in an integrated CMOS circuit, the method comprising generating a current reference with a first regular MOS transistor connect to a line voltage, providing resistance with a second regular MOS transistor connected to ground, and generating a constant with temperature reference voltage VREF from a terminal inter-connecting the regular MOS transistor reference current source and the regular MOS transistor resistor.
(canceled)
Dependencies are inferred from the claim text.