Configuration of Voltage Regulation Circuitry

A method, comprising:

• fabricating core circuitry connected between a high core voltage supply (VDD) and a low core voltage supply (VSS), the core circuitry having multiple transistors including a p-type transistor and an n-type transistor;
• fabricating DC-DC voltage regulation circuitry connected between an externally supplied voltage (VBAT) and ground (GND), wherein the DC-DC voltage regulation circuitry generates the low core voltage supply (VSS) that is greater than ground (GND), and wherein the DC-DC voltage regulation circuitry further generates a back-gate potential (VBNP) that is between the low core voltage supply (VSS) and ground (GND), and wherein the voltage regulation circuitry applies the back-gate potential voltage (VBNP) to back-bias terminals of the p-type transistor and the n-type transistor;
• calibrating a core supply voltage (VDD-VSS) by tuning the low core voltage supply (VSS) to a target frequency of a circuit delay monitor that is designed for sensitivity to an average delay of the p-type transistor and the n-type transistor;
• and
• calibrating the common back-gate potential (VBNP) to a target frequency ratio of at least two circuit delay monitors having different sensitivity to the average delay of the p-type transistor and the n-type transistor.

A method for manufacturing an integrated circuit, the method comprising:

• fabricating core circuitry with a high supply (VDD) and a low supply (VSS), wherein the high supply (VDD) is greater than the low supply (VSS), and wherein the low supply (VSS) is greater than ground (GND);
• fabricating the core circuitry with multiple transistors including complementary transistors of a first polarity and a second polarity;
• connecting a pin for the high supply (VDD) to an externally supplied voltage (VBAT) that is greater than a core supply voltage (VDD-VSS);
• fabricating and connecting voltage regulation circuitry between the externally supplied voltage (VBAT) and ground (GND);
• and
• fabricating the voltage regulating circuitry to generate the low supply (VSS) and a single control voltage (VBNP) to provide a common body bias for the multiple transistors having the first polarity and the second polarity, wherein the single control voltage (VBNP) is greater than ground (GND) such that (GND VBNP VDD), and wherein a difference between the single control voltage and the low supply (VBNP-VSS) is positive or negative.