Systems and methods for bypass testing
AssigneeIntel Corporation
InventorsKishore Kasichainula, Satheesh Chellappan, Lay Chen Ong, Harish G. Kamat
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Abstract
Technology for bypass testing of an integrated circuit using a testing device. The testing device comprising a port configured to connect to an integrated circuit before the integrated circuit is packaged into an end product. The testing device further comprising a controller with architecture configured to bypass a training process designed to be initiated when the integrated circuit is first connected to the port and the port is powered on, confirm a connection between the integrated circuit and the testing device, send a test pattern to the integrated circuit to execute; and receive results from the integrated circuit executing the test pattern.
Claims29
A testing device for testing an integrated circuit, comprising:
- a port configured to connect to an integrated circuit before the integrated circuit is packaged into an end product;
- and
- a controller with architecture configured to:
- bypass a training process designed to be initiated when the integrated circuit is first connected to the port and the port is powered on;
- confirm a connection between the integrated circuit and the testing device;
- send a test pattern to the integrated circuit to execute;
- and
- receive results from the integrated circuit executing the test pattern.
A method for testing an integrated circuit, comprising:
- bypassing a training process designed to be initiated when an integrated circuit is first connected to a port of a testing device and the port is powered on;
- confirming a connection between the integrated circuit and the testing device via a controller of the testing device;
- sending a test pattern to the integrated circuit to execute;
- and
- receiving results from the integrated circuit executing the test pattern.
Dependencies are inferred from the claim text.