Low-profile gimbal platform for high-resolution in situ co-planarity adjustment
AssigneeIntel Corporation
InventorsPAUL J. DIGLIO, JOSEPH F. WALCZYK
Life of this patent
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Abstract
Planar error between a probe card and a semiconductor wafer may be reduced with a low-profile gimbal platform. The low-profile gimbal platform may be coupled between a probe card and a tester head. The low-profiled gimbal platform includes a number of linear actuators and pistons that are used to perform high-precision in situ planarity adjustments to the probe card to achieve co-planarity between the probe card and the semiconductor wafer. The in situ planarity adjustments may reduce the likelihood of malfunctions due to misalignment of the probe card.
Claims24
A low-profile gimbal platform, comprising:
- a plate having a first surface and a second surface;
- a first linear actuator horizontally positioned within the plate between the first surface and the second surface, wherein the first linear actuator includes a first shaft that extends and retracts in parallel with the first surface;
- a first piston coupled to the first shaft, wherein the first piston extends or retracts perpendicularly to the first surface, in response to extension or retraction of the first shaft;
- a second linear actuator horizontally positioned within the plate between the first surface and the second surface, wherein the second linear actuator includes a second shaft that extends and retracts in parallel with the first surface;
- and
- a second piston coupled to the second shaft, wherein the second piston extends or retracts perpendicularly to the first surface, in response to extension or retraction of the second shaft.
A semiconductor device testing system, comprising:
- a tester system, including:
- a test computing system that acquires information about one or more devices under test;
- and
- a tester head physically and electrically coupled between a probe card and the test computing system to transfer the information from the one or more devices under test to the test computing system;
- and
- a low-profile gimbal platform mechanically coupled between the probe card and the tester head to align a plane of the probe card with a plane of a semiconductor wafer of the one or more devices under test, the low-profile gimbal platform including:
- a plate having a first surface and a second surface;
- a first linear actuator horizontally positioned within the plate between the first surface and the second surface, wherein the first linear actuator includes a first shaft that extends and retracts in parallel with the first surface;
- a first piston coupled to the first shaft, wherein the first piston extends or retracts perpendicularly to the first surface, in response to extension or retraction of the first shaft;
- a second linear actuator horizontally positioned within the plate between the first surface and the second surface, wherein the second linear actuator includes a second shaft that extends and retracts in parallel with the first surface;
- and
- a second piston coupled to the second shaft, wherein the second piston extends or retracts perpendicularly to the first surface, in response to extension or retraction of the second shaft.
A method of operating a low-profile gimbal platform to reduce planar error, the method comprising:
- measuring, by a tester system, planar error between a probe card and a semiconductor wafer of one or more devices under test;
- determining, by the tester system, which one or more of a plurality of linear actuators in a low-profile gimbal platform to operate to reduce the planar error;
- and
- transmitting instructions to the low-profile gimbal platform to operate one or more of the plurality of linear actuators to reduce the planar error.
Dependencies are inferred from the claim text.