Clearance size reduction for backdrilled differential vias

A device comprising:

• a plurality of horizontally disposed layers;
• a first differential via electrically connected to a first set of horizontally disposed layers, of the plurality of horizontally disposed layers, and a second set of horizontally disposed layers of the plurality of horizontally disposed layers,
• the first set of horizontally disposed layers being different from the second set of horizontally disposed layers, and
• the first differential via being vertically disposed and including a first vertically disposed stub that extends from a bottom surface of the device to an end of the second set of horizontally disposed layers;
• a second differential via electrically connected to the first set of horizontally disposed layers and the second set of horizontally disposed layers,
• the second differential via being vertically disposed and including a second vertically disposed stub that extends from the bottom surface of the device to the end of the second set of horizontally disposed layers;
• a first set of clearances associated with the first differential via and the second differential via;
• and
• a second set of clearances associated with the first vertically disposed stub and the second vertically disposed stub.

A method, comprising:

• fabricating a printed circuit board (PCB) to include:
• a plurality of horizontally disposed signal layers;
• a first vertically disposed differential via electrically connected to a first set of horizontally disposed signal layers, of the plurality of horizontally disposed signal layers, and a second set of horizontally disposed signal layers of the plurality of horizontally disposed signal layers,
• the first set of horizontally disposed signal layers being different from the second set of horizontally disposed signal layers, and
• the first vertically disposed differential via including a first vertically disposed stub that extends from a bottom surface of the PCB to an end of the second set of horizontally disposed signal layers;
• a second vertically disposed differential via electrically connected to the first set of horizontally disposed signal layers and the second set of horizontally disposed signal layers,
• the second vertically disposed differential via including a second vertically disposed stub that extends from the bottom surface of the PCB to the end of the second set of horizontally disposed signal layers;
• a first set of clearances encompassing the first vertically disposed differential via and the second vertically disposed differential via;
• a second set of clearances encompassing the first vertically disposed stub;
• and
• a third set of clearances encompassing the second vertically disposed stub.