Simplified 3-phase mapping and coding

A data communication apparatus, comprising:

• a bus interface configured to couple the apparatus to three wires of a communication link;
• a 3-phase encoder adapted to provide sequences of symbols used to configure three-phase signals transmitted over the three wires;
• and
• a processing circuit configured to:
• configure the 3-phase encoder for a first mode of operation in which data is encoded in a sequence of two-bit symbols;
• transmit a first three-phase signal that is representative of the sequence of two-bit symbols on each of the three wires, wherein the first three-phase signal is in a different phase on each wire when each symbol in the sequence of two-bit symbols is transmitted, and wherein a transition in signaling state in one or more wires occurs between transmission of each pair of symbols in the sequence of two-bit symbols;
• configure the 3-phase encoder for a second mode of operation in which data is encoded in a sequence of three-bit symbols;
• and
• transmit a second three-phase signal that is representative of the sequence of three-bit symbols on each of the three wires, wherein the second three-phase signal is in a different phase on each wire when each symbol in the sequence of three-bit symbols is transmitted, and wherein a transition in signaling state in at least one wire occurs between transmission of each pair of symbols in the sequence of three-bit symbols.

A processor-readable storage medium having one or more instructions which, when executed by at least one processor of a processing circuit, cause the processing circuit to:

• configure a 3-phase encoder for a first mode of operation in which data is encoded in a sequence of two-bit symbols;
• transmit a first three-phase signal that is representative of the sequence of two-bit symbols on each of three wires, wherein the first three-phase signal is in a different phase on each wire when each symbol in the sequence of two-bit symbols is transmitted, and wherein a transition in signaling state in one or more wires occurs between transmission of each pair of symbols in the sequence of two-bit symbols;
• configure the 3-phase encoder for a second mode of operation in which data is encoded in a sequence of three-bit symbols;
• and
• transmit a second three-phase signal that is representative of the sequence of three-bit symbols on each of the three wires, wherein the second three-phase signal is in a different phase on each wire when each symbol in the sequence of three-bit symbols is transmitted, and wherein a transition in signaling state in at least one wire occurs between transmission of each pair of symbols in the sequence of three-bit symbols.

An apparatus comprising:

• means for configuring a 3-phase encoder, wherein in a first mode of operation, data is encoded in a sequence of two-bit symbols, and wherein in a second mode of operation, data is encoded in a sequence of three-bit symbols;
• and
• means for transmitting three-phase signals on each of three wires,
• wherein in the first mode of operation, a first three-phase signal that is representative of the sequence of two-bit symbols is transmitted on each of the three wires, wherein the first three-phase signal is in a different phase on each wire when each symbol in the sequence of two-bit symbols is transmitted, and wherein a transition in signaling state in one or more wires occurs between transmission of each pair of symbols in the sequence of two-bit symbols, and
• wherein in the second mode of operation, a second three-phase signal that is representative of the sequence of three-bit symbols is transmitted on each of the three wires, wherein the second three-phase signal is in a different phase on each wire when each symbol in the sequence of three-bit symbols is transmitted, and wherein a transition in signaling state in one or more wires occurs between transmission of each pair of symbols in the sequence of three-bit symbols.