System and method for generating a symmetrically balanced output

A system for generating a symmetrically balanced output to accomplish a plurality of predefined properties, the system comprises:

• a processor;
• and
• a memory to store machine-readable instructions that when executed by the processor cause the processor to:
• receive a plurality of registers with B bits, an expression length, and a plurality of operators through a receiving module;
• generate a random expression population through a random expression population generation module;
• compute a fitness value of the random expression population through a fitness function module;
• and
• provide registers with B bits if a plurality of output bits are having an equal number of 1s and 0s through a conditional module, wherein the conditional module performs mutation in the operators if the output bits are not having an equal number of 1s and 0s.

A device in a network, comprising:

• a non-transitory storage device having embodied therein one or more routines operable to generate a symmetrically balanced output to accomplish a plurality of predefined properties;
• and
• one or more processors coupled to the non-transitory storage device and operable to execute the one or more routines, wherein the one or more routines include:
• a receiving module to receive a plurality of registers with B bits, an expression length, and a plurality of operators;
• a random expression population generation module to generate a random expression population;
• a fitness function module to compute a fitness value of the random expression population;
• and
• a conditional module to provide registers with B bits if a plurality of output bits are having an equal number of 1s and 0s, wherein the conditional module performs mutation in the operators if the output bits are not having an equal number of 1s and 0s.