Min-sum decoding for ldpc codes

A low density-parity check (LDPC) decoding system comprising:

• one or more processors;
• and
• one or more memories communicatively coupled with the one or more processors and storing instructions that, upon execution by the one or more processors, configure the LDPC decoding system to at least:
• receive an LDPC codeword;
• and
• decoded bits of the LDPC codewords based on a plurality of variable nodes connected to a plurality of check nodes, wherein the decoding of the bits comprises:
• receiving, by a check node from a first variable node, a first value indicating a reliability of a bit value for a first bit of the LDPC codeword, the first variable node corresponding to the first bit and connected to the check node;
• determining, by the check node, that the first value is equal to a minimum value stored by the check node for a second variable node, the second variable node corresponding to a second bit of the LDPC codeword and connected to the check node;
• generating, by the check node in response to determining that the first value is equal to the minimum value, an adjusted minimum value by at least updating the minimum value according to an adjustment value;
• and
• sending, by the check node to a third variable node, the adjusted minimum value, the third variable node corresponding to a third bit of the LDPC codeword and connected to the check node,
• wherein the third bit is decoded based on the adjusted minimum value.

One or more non-transitory computer storage media comprising instructions that, upon execution on a low density-parity check (LDPC) decoding system, configure the LDPC decoding system to perform operations comprising:

• receiving an LDPC codeword;
• and
• decoding bits of the LDPC codewords based on a plurality of variable nodes connected to a plurality of check nodes, wherein the decoding of the bits comprises:
• receiving, by a check node from a first variable node, a first value indicating a reliability of a bit value for a first bit of the LDPC codeword, the first variable node corresponding to the first bit and connected to the check node;
• determining, by the check node, that the first value is equal to a minimum value stored by the check node for a second variable node, the second variable node corresponding to a second bit of the LDPC codeword and connected to the check node;
• generating, by the check node in response to determining that the first value is equal to the minimum value, an adjusted minimum value by at least updating the minimum value according to an adjustment value;
• and
• sending, by the check node to a third variable node, the adjusted minimum value, the third variable node corresponding to a third bit of the LDPC codeword and connected to the check node,
• wherein the third bit is decoded based on the adjusted minimum value.