Timing for ic chip
AssigneeTexas Intruments Incorporated
InventorsJasbir Singh Nayyar, Brian Ginsburg, KARTHIK SUBBURAJ
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Abstract
A integrated circuit (IC) chip can include a root timer that generates a frame pulse based on a start trigger signal. The IC chip can also include a hardware clock control that provides a clock signal based on a selected one of the frame pulse and the synchronization signal provided from one of the root timer and another IC chip. The IC chip can further include a plurality of analog to digital converters (ADCs). Each of the plurality of ADCs being configured to sample an output of a respective one of a plurality of radio frequency (RF) receivers based on the clock signal.
Claims21
An integrated circuit (IC) chip comprising:
- a root timer that generates a frame pulse based on a start trigger signal;
- a hardware clock control that provides a clock signal based on a selected one of the frame pulse and a synchronization signal provided from one of the root timer and another IC chip;
- and
- a plurality of analog to digital converters (ADCs), each of the plurality of ADCs being configured to sample an output of a respective one of a plurality of radio frequency (RF) receivers based on the clock signal.
An integrated circuit (IC) chip comprising:
- a microcontroller that generates a software trigger signal;
- a trigger selector that receives the software trigger signal and selects a synchronization signal to provide a start trigger signal;
- a root timer that generates the synchronization signal based on the start trigger signal, wherein the synchronization signal is provided to a synchronization output port of the IC chip that is coupled to a synchronization input port of the IC chip;
- a hardware clock control that provides a clock signal based on the synchronization signal received at the synchronization input port;
- and
- a plurality of analog to digital converters (ADCs) that are each configured to sample an output of a respective one of a plurality of receivers based on the clock signal.
A system comprising:
- a controller that processes radar data to determine a location of an object;
- a master integrated circuit (IC) chip, the master IC chip being configured to:
- sample a plurality of received RF signals at predetermined instances, wherein a timing of the sampling is based on a synchronization signal generated by the master IC chip;
- perform a plurality of software operations based on timing corresponding to the synchronization signal;
- and
- one or more slave IC chips, each of the one or more slave IC chip being configured to:
- sample a plurality of received RF signals at predetermined instances, wherein a timing of the sampling is based on the synchronization signal generated by the master IC chip;
- perform a plurality of software operations based on timing corresponding to the synchronization signal.
Dependencies are inferred from the claim text.