Sar-type analog-digital converter using residue integration

A successive approximation register (SAR)-type analog-digital converter (ADC) using residue integration, comprising:

• a coarse/fine SAR conversion unit configured to receive an analog input voltage and convert the received voltage into an MSB digital signal in a coarse SAR conversion mode, and receive a feedback voltage and convert the received voltage into an LSB digital signal in a fine SAR conversion mode;
• a residue integration unit configured to repeatedly amplify a residual voltage with a predetermined gain by a predetermined number of times and output the amplified voltage as a final target multiple, the residual voltage corresponding to a voltage difference between the analog input voltage and an analog voltage obtained by converting the digital signal into an analog signal;
• and
• a digital signal output unit configured to add up a coarse SAR conversion result supplied from the coarse/fine SAR conversion unit, a result of a delta-signal modulation (DSM) loop installed in the residue integration unit, and a fine SAR conversion result supplied from the coarse/fine SAR conversion unit, and output a digital code of the corresponding bit.