Dynamic termination edge control
AssigneeMicron Technology, Inc.
InventorsKallol Mazumder, Myung-Ho Bae
Life of this patent
Estimating the term…
Abstract
Devices and methods include receiving a command at a command interface to assert on-die termination (ODT) during an operation. An indication of a shift mode register value is received via an input. The shift mode register value corresponds to a number of shifts of a rising edge of the command in a backward direction. A delay pipeline delays the received command the number of shifts in the backward direction to generate a shifted rising edge command signal. Combination circuitry is configured to combine a falling edge command signal with the shifted rising edge command signal to form a transformed command.
Claims20
A semiconductor device comprising:
- a delay pipeline comprising a plurality of serially connected flip-flops, wherein the delay pipeline is configured to receive an ODT command to assert on-die termination (ODT) for a data pin of the semiconductor device and to generate and output a plurality of delayed commands in a backward direction to generate a shifted command;
- and
- selection circuitry configured to receive a selection signal to indicate a selected delayed command from the plurality of delayed commands used to generate the shifted command, wherein the shifted command is configured to enable the ODT during a memory write based at least in part on the selected delayed command.
A semiconductor device, comprising:
- a delay pipeline comprising a plurality of serially connected flip-flops, wherein the delay pipeline is configured to receive a command to assert on-die termination (ODT) for a data pin of the semiconductor device and to generate and output a plurality of delayed commands in a backward direction to generate a shifted command;
- and
- selection circuitry configured to:
- receive a first selection signal to indicate a first delayed command from the plurality of delayed commands used to generate the shifted command, wherein the shifted command is configured to enable the ODT on the data pin during a memory write based at least in part on the first delayed command;
- and
- receive a second selection signal to indicate a second delayed command from the plurality of delayed commands to generate the shifted command, wherein the shifted command has a duration that is based at least in part on the second delayed command.
A method, comprising:
- receiving a write command to begin a write operation;
- receiving a set of shift values to control edges of an assert on-die termination (ODT) command for a data pin during the write operation;
- delaying an input ODT command in a delay pipeline to generate a plurality of shifted ODT commands;
- selecting a first shifted ODT command from the plurality of shifted ODT commands using a first value of the set of shift values;
- selecting a second shifted ODT command from the plurality of shifted ODT commands using a second value of the set of shift values;
- and
- combining the first and second shifted ODT commands to form a combined shifted ODT command;
- and
- performing the write operation using the combined shifted ODT command to assert ODT during the write operation.
Dependencies are inferred from the claim text.