Semiconductor apparatus for detecting an edge of a signal
AssigneeSK hynix Inc.
InventorDong Hyun KIM
Life of this patent
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Abstract
A semiconductor apparatus includes first and second edge detection signal generators. The first edge detection signal generator may generate a first edge detection signal by gating an input signal and its inverted signal based on a first gating control signal, generated by delaying the input signal, and output the first edge detection signal to an output node. The second edge detection signal generator may generate a second edge detection signal by gating a complementary signal of the input signal and its inverted signal based on a second gating control signal, generated by delaying the complementary signal, and output the second edge detection signal to the output node. An output signal may be generated at the output node.
Claims16
A semiconductor apparatus comprising:
- a first edge detection signal generator configured to generate a first edge detection signal by gating an input signal and an inverted signal of the input signal based on a first gating control signal, generated by delaying the input signal and configured to output the first edge detection signal to an output node;
- and
- a second edge detection signal generator configured to generate a second edge detection signal by gating a complementary signal of the input signal and an inverted signal of the complementary signal based on a second gating control signal, generated by delaying the complementary signal and configured to output the second edge detection signal to the output node,
- wherein an output signal is generated at the output node.
A semiconductor apparatus comprising:
- an edge detection circuit configured to generate a first edge detection signal by detecting rising and falling edges of an input clock signal, generate a second edge detection signal by detecting rising and falling edges of a complementary signal of the input clock signal, and generate an output clock signal by combining the first and second edge detection signals;
- and
- a differential clock generator configured to generate first and second clock signals based on the output clock signal.
Dependencies are inferred from the claim text.