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US 2019/0097384 A1Published application
Method of manufacturing light emitting device
AssigneeSodick Co., Ltd.
InventorYuki TSUDA
Life of this patent
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Abstract
Shown is a method of manufacturing a light emitting device capable of efficiently heating a device at the time of DPP annealing and suppressing heat generation of the device at the time of driving. In the method of manufacturing the light emitting device, a first p-type electrode is formed on a low-concentration portion having a low p-type dopant concentration formed under a first region of the p-type semiconductor portion, a second p-type electrode is formed on a high-concentration portion having a high p-type dopant concentration formed under a second region of the p-type semiconductor portion, and a predetermined forward bias voltage is applied between the first p-type electrode and a first n-type electrode formed on an n-type semiconductor portion at the time of DPP annealing.
Claims6
A method of manufacturing a light emitting device comprising:
- a device formation process of forming a device in which boron is ion-implanted in a concentration range of 1×1019 particles/cm3 or more and 1×1021 particles/cm3 or less into one surface in a thickness direction of a substrate formed of single-crystal silicon in which n-type dopants consisting of one or more of arsenic and antimony are uniformly diffused in a concentration range of 1×1014 particles/cm3 or more and 1×1016 particles/cm3 or less so that a p-type semiconductor portion in which diffusion is made to have a higher p-type dopant concentration than an n-type dopant concentration is formed on the one surface side, an n-type semiconductor portion in which n-type dopants are diffused is formed on the other surface side facing the one surface, and a pn junction portion is formed at a boundary portion between the p-type semiconductor portion and the n-type semiconductor portion;
- a first low resistance portion formation process of polishing a second region excluding a first region on the one surface or ion-implanting p-type dopants into the second region so that a p-type dopant concentration of the p-type semiconductor portion under the second region is 1×1019 particles/cm3 or more;
- a first electrode formation process of forming a first p-type electrode in the first region, a second p-type electrode independent from the first p-type electrode in the second region, and a first n-type electrode on the other surface;
- and
- a DPP annealing process of repeatedly changing distribution of dopants by diffusing p-type dopants and n-type dopants inside the pn junction portion with heat generated when a predetermined forward bias voltage is applied to the first p-type electrode and the first n-type electrode so that the side of p-type semiconductor portion has a positive voltage and the side of n-type semiconductor portion has a negative voltage to cause a current to flow in the pn junction portion, and decreasing the current flowing in the pn junction portion and reducing a temperature thereof to fix distribution of p-type dopants and n-type dopants inside the pn junction portion by causing a population inversion between a conduction band and a valence band to occur in the pn junction portion to induce and emit electrons in the conduction band forming the population inversion.
2 more elements
A method of manufacturing a light emitting device comprising:
- a device formation process of forming a device in which boron is ion-implanted in a concentration range of 1×1019 particles/cm3 or more and 1×1021 particles/cm3 or less into one surface in a thickness direction of a substrate formed of single-crystal silicon in which n-type dopants consisting of one or more of arsenic and antimony are diffused in a concentration range of 1×1014 particles/cm3 or more and 1×1021 particles/cm3 or less so that a p-type semiconductor portion in which diffusion is made to have a higher p-type dopant concentration than an n-type dopant concentration is formed on the one surface side, an n-type semiconductor portion in which n-type dopants are diffused is formed on the other surface side facing the one surface, and a pn junction portion in which n-type dopants and p-type dopants are mixed and diffused is formed at a boundary portion between the p-type semiconductor portion and the n-type semiconductor portion;
- a third electrode formation process of forming a third p-type electrode on the one surface and forming a third n-type electrode on the other surface;
- a DPP annealing process of repeatedly changing distribution of dopants by diffusing p-type dopants and n-type dopants inside the pn junction portion with heat generated when a predetermined forward bias voltage is applied to the third p-type electrode and the third n-type electrode so that the side of p-type semiconductor portion has a positive voltage and the side of n-type semiconductor portion has a negative voltage to cause a current to flow in the pn junction portion, and decreasing the current flowing in the pn junction portion and reducing a temperature thereof to fix distribution of p-type dopants and n-type dopants inside the pn junction portion by causing a population inversion between a conduction band and a valence band to occur in the pn junction portion to induce and emit electrons in the conduction band forming the population inversion;
- a second electrode removing process of removing the third p-type electrode;
- a third low resistance portion formation process of polishing the one surface or ion-implanting p-type dopants into the one surface so that a p-type dopant concentration of the p-type semiconductor portion is 1×1019 particles/cm3 or more;
- and
- a fourth electrode formation process of re-forming a fourth p-type electrode on the one surface.
4 more elements
Dependencies are inferred from the claim text.