Area-Efficient Single-legged SOI MOSFET structure immune to single-event-effects and bipolar latch-up

A semiconductor electronic device comprising a Silicon-On-Insulator (SOI) substrate wherein a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is built;

• the MOSFET comprises:
• An active semiconductor layer on top of a buried dielectric with an insulating dielectric film separating a Gate electrode from a portion of the active semiconductor layer;
• the active semiconductor layer comprises:
• Two highly doped regions having a first conductivity type that form a Drain and a Source and extend laterally under the Gate electrode region from two opposing ends, a highly doped HALO pocket under the Gate electrode next to the Drain that has a second conductivity type opposite to the first conductivity type, a second highly doped pocket under the Gate electrode next to the Source that has second conductivity type and contacts the Source electrically through a layer of Silicide, and a region between both pockets that forms a central Body and has second conductivity type with a less doping level than both pockets;