Gate stacks
AssigneeMicro Technology, Inc.
InventorsYushi Hu, John Mark Meldrim, Eric Blomiley, Everett Allen McTeer, Matthew J. King
Life of this patent
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Abstract
Some embodiments disclose a gate stack having a gate (e.g., polysilicon (poly) material) horizontally between shallow trench isolations (STIs), a tungsten silicide (WSix) material over the gate and the STIs, and a tungsten silicon nitride (WSiN) material on a top surface of the WSix material. Some embodiments disclose a gate stack having a gate between STIs, a first WSix material over the gate and the STIs, a WSiN interlayer material on a top surface of the first WSix material, and a second WSix material on a top surface of the WSiN interlayer material. Additional embodiments are disclosed.
Claims19
A memory device comprising:
- a memory array;
- and
- a peripheral transistor coupled to the memory array, the peripheral transistor comprising:
- a gate between shallow trench isolations (STIs) and directly contacting the STIs, a height he gate being different from a height of the STIs;
- a tungsten silicide (WSix) material on a top surface of the gate and top surfaces of the STIs;
- and
- a tungsten silicon nitride. (WSiN) material on a top surface of the WSix material.
A memory device comprising:
- a memory array;
- and
- a peripheral transistor coupled to the memory array, the peripheral transistor comprising:
- a gate between shallow trench isolations (STIs) and directly contacting the STIs, a height of the gate being different from a height of the STIs;
- a first tungsten silicide (WSix) material on a top surface of the gate and top surfaces of the STIs;
- a tungsten silicon nitride (WSiN) interlayer material on a top surface of the first WSix material;
- and
- a second WSix material on a top surface of the WSiN inter layer material.
A three dimensional (3D) NAND memory device comprising:
- a NAND memory array;
- and
- a peripheral transistor coupled to the NAND memory array, the peripheral transistor comprising:
- a gate between first and second dielectric materials and directly contacting the first and second dielectric materials, the gate including a height different from a height of each of the first and second dielectric materials;
- a silicide material on a top surface of the gate and on top surfaces of the first and second dielectric materials;
- and
- a combination of metal and silicon nitride material on a top surface of the silicide material.
Dependencies are inferred from the claim text.