Semiconductor device and manufacturing method thereof

A semiconductor device, comprising:

• a semiconductor substrate forming a semiconductor chip;
• an element region arranged in a first surface of the semiconductor substrate;
• an element arranged at the element region;
• a first semiconductor region of a first conductivity type provided at the first surface in such a manner as to surround the element region in a plan view;
• a first insulation film provided over the first surface in such a manner as to surround the first semiconductor region in a plan view;
• a second insulation film provided over the first surface inside and outside the first insulation film in a plan view, and, thinner than the first insulation film in a cross sectional view;
• a conductor plate part provided over the first insulation film and the second insulation film in such a manner as to surround the element region in a plan view;
• a third insulation film provided over the first surface in such a manner as to cover the first insulation film, the second insulation film, and the conductor plate part in a cross sectional view;
• a first metal pattern provided over the third insulation film in such a manner as to surround the element region inside the conductor plate part in a plan view, and, electrically coupled with a first electrode of the element and the first semiconductor region;
• and
• a second metal pattern provided over the third insulation film in such a manner as to surround the first metal pattern outside the conductor plate part in a plan view, and, electrically coupled with a second electrode of the element,
• wherein the conductor plate part includes:
• a first conductor pattern arranged in such a manner as to surround the element region in a plan view;
• a second conductor pattern arranged in such a manner as to surround the first conductor pattern in a plan view;
• and
• a third conductor pattern arranged between the first conductor pattern and the second conductor pattern in a plan view, and, for electrically coupling the first conductor pattern and the second conductor pattern,
• wherein the first conductor pattern has a first extension part extending inside the inner circumference end of the first insulation film, and between the second insulation film and the third insulation film in a cross sectional view,
• wherein the first metal pattern and the first conductor pattern are electrically coupled through a first coupling hole arranged in a region where the first metal pattern and the first extension part overlap each other in a plan view, and formed in the third insulation film in a cross sectional view,
• wherein the second conductor pattern has a second extension part extending outside the outer circumference end of the first insulation film, and between the second insulation film and the third insulation film in a cross sectional view,
• wherein the second metal pattern and the second extension part are electrically coupled through a second coupling hole arranged in a region where the second metal pattern and the second extension part overlap each other in a plan view, and, formed in the third insulation film in a cross sectional view, and
• wherein the first metal pattern and the first semiconductor region are electrically coupled through a third coupling hole arranged in a region where the first metal pattern and the first semiconductor region overlap each other in a plan view, and, formed in the second insulation film and the third insulation film in a cross sectional view.

A method for manufacturing a semiconductor device, comprising the steps of:

• (a) forming a pattern of a first insulation film over a first surface of a semiconductor substrate in such a manner as to surround an element region formed at the first surface;
• (b) forming a first semiconductor region inside the pattern of the first insulation film in such a manner as to surround the element region;
• (c) depositing a second insulation film thinner than the pattern of the first insulation film over the first surface in such a manner as to cover the pattern of the first insulation film;
• (d) forming a conductor plate part over the first insulation film and the second insulation film in such a manner as to surround the element region;
• (e) depositing a third insulation film over the first surface in such a manner as to cover the conductor plate part, the first insulation film, and the second insulation film;
• (f) forming a coupling hole for exposing a part of the conductor plate part in the third insulation film;
• and
• (g) forming a first metal pattern surrounding the element region, and a second metal pattern surrounding the first metal pattern over the third insulation film,
• wherein in the step (d),
• a first conductor pattern surrounding the element region in a plan view,
• a second conductor pattern surrounding the first conductor pattern in a plan view, and
• a third conductor pattern arranged between the first conductor pattern and the second conductor pattern in a plan view, and for electrically coupling the first conductor pattern and the second conductor pattern,
• are formed, and
• wherein in the step (g), the first metal pattern is formed such that the outer circumference end of the first metal pattern is separated from the outer circumference end of the first conductor pattern toward the element region.