Fully strained channel
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShahaji B. MORE, Huai-Tei YANG, Zheng-Yang PAN, Shih-Chieh CHANG, Chun-Chieh WANG, Cheng-Han LEE
Life of this patent
Estimating the term…
Abstract
The present disclosure describes an exemplary method to form p-type fully strained channel (PFSC) or an n-type fully strained channel (NFSC) that can mitigate epitaxial growth defects or structural deformations in the channel region due to processing. The exemplary method can include (i) two or more surface pre-clean treatment cycles with nitrogen trifluoride (NF3) and ammonia (NH3) plasma, followed by a thermal treatment; (ii) a prebake (anneal); and (iii) a silicon germanium epitaxial growth with a silicon seed layer, a silicon germanium seed layer, or a combination thereof.
Claims21
A method comprising:
- providing a doped region on a top portion of a substrate;
- growing a first epitaxial layer on the doped region;
- forming a well in the first epitaxial layer that is aligned to the doped region, wherein the well comprises a bottom surface of the first epitaxial layer;
- performing one or more surface pre-clean treatment cycles, wherein each surface pre-clean treatment cycle comprises:
- exposing the well to a plasma;
- and
- performing an anneal;
- and
- forming a second epitaxial layer in the well, wherein forming the second epitaxial layer comprises:
- performing a prebake at a first temperature;
- forming a seed layer on the bottom surface of the first epitaxial layer at a second temperature;
- and
- forming the second epitaxial layer on the seed layer at a third temperature to fill the well.
A method comprising:
- forming a n-type region on a top portion of a substrate;
- growing a silicon epitaxial layer on the n-type region;
- forming a dielectric layer on the silicon epitaxial layer;
- forming an opening in the dielectric layer that is aligned to the n-type region to expose the silicon epitaxial layer;
- partially etching the silicon epitaxial layer through the opening to form a recess in the silicon epitaxial layer, wherein the recess comprises a bottom surface of the silicon epitaxial layer,
- performing a pre-clean treatment cycle;
- and
- forming an epitaxial stack in the recess, wherein forming the epitaxial stack comprises:
- performing a prebake;
- forming a seed layer on the bottom surface of the silicon epitaxial layer;
- and
- forming the epitaxial layer on the seed layer to fill the recess.
18-20. (canceled)
A method, comprising:
- forming fins on a substrate, the fins comprising a bottom portion with a doped region, a middle portion with a first epitaxial layer, and a top portion with a seed layer and a second epitaxial layer, and wherein forming the fins comprises:
- forming the doped region on a top portion of the substrate;
- epitaxially growing the first epitaxial layer on the doped region;
- forming a recess in the first epitaxial layer over the doped region by etching the first epitaxial layer over the doped region, wherein the recess comprises a bottom surface of the first epitaxial layer;
- exposing the recess to one or more surface pre-clean treatment cycles, wherein each of the one or more surface pre-clean treatment cycles comprises a plasma and an anneal;
- epitaxially growing the second epitaxial layer in the recess by performing a prebake, depositing the seed layer on the bottom surface of the first epitaxial layer, and growing the second epitaxial layer on the seed layer;
- removing portions of the second epitaxial layer, the seed layer, the first epitaxial layer, and the doped region to form the fins;
- and
- forming a dielectric layer between the fins.
Dependencies are inferred from the claim text.