Three-dimensional memory devices, and related methods and electronic systems

A method of forming a three-dimensional memory device, comprising:

• forming a stack structure comprising stacked tiers, each of the stacked tiers comprising a first structure and a second structure longitudinally adjacent the first structure;
• forming a patterned hard mask structure over the stack structure;
• forming dielectric structures within openings in the patterned hard mask structure, upper surfaces of the dielectric structures substantially coplanar with upper surfaces of the patterned hard mask structure;
• forming a photoresist structure extending over the upper surfaces of the dielectric structures and the upper surfaces of the patterned hard mask structure;
• subjecting the photoresist structure, the dielectric structures, and the stack structure to a series of material removal processes to selectively remove portions of the photoresist structure, portions of the dielectric structures not covered by remaining portions of the photoresist structure, and portions of the stack structure not covered by one or more of the patterned hard mask structure and the remaining portions of the photoresist structure to form openings longitudinally extending to different depths than one another within the stack structure;
• and
• forming conductive contact structures within the openings.

An electronic system, comprising:

• an input device;
• an output device;
• a processor device operably coupled to the input device and the output device;
• and
• a three-dimensional memory device operably coupled to the processor device and comprising at least one access device comprising:
• a stack structure free of stair step structures located at lateral ends thereof and comprising
• stacked tiers each individually comprising a conductive structure and an
• insulating structure longitudinally adjacent the conductive structure;
• and
• conductive contact structures longitudinally extending to different depths than one another within the stack structure;
• vertical strings of memory cells longitudinally extending through the stack structure;
• conductive line structures electrically coupled to the conductive contact structures;
• and
• a control device underlying the stack structure and electrically coupled to the conductive line structures.