Epitaxial source and drain structures for high voltage devices
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYi-Huan Chen, Chien-Chih Chou, Kong-Beng Thei
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Abstract
An integrated circuit having an epitaxial source and drain, which reduces gate burnout and increases switching speed so that is suitable for high voltage applications, is provided. The integrated circuit includes a semiconductor substrate having a high voltage N-well (HVNW) and a high voltage P-well (HVPW). The integrated circuit further includes a high-voltage device on the semiconductor substrate. The high-voltage device includes an epitaxial p-type source disposed in the HVNW, an epitaxial p-type drain disposed in the HVPW, and a gate arranged between the epitaxial p-type source and the epitaxial p-type drain on a surface of the semiconductor substrate.
Claims21
An integrated circuit (IC) comprising:
- a semiconductor substrate having a high voltage N-well (HVNW) and a high voltage P-well (HVPW);
- and
- a high-voltage device on the semiconductor substrate, wherein the high-voltage device comprises an epitaxial p-type source disposed in the HVNW, an epitaxial p-type drain disposed in the HVPW, and a gate arranged between the epitaxial p-type source and the epitaxial p-type drain on a surface of the semiconductor substrate.
An integrated circuit (IC) comprising:
- a semiconductor substrate having a high voltage P-well (HVPW) and a high voltage N-well (HVNW);
- and
- a high-voltage device on the semiconductor substrate, wherein the high-voltage device comprises an epitaxial n-type source disposed in the HVPW, an epitaxial n-type drain disposed in the HVNW, and a gate arranged between the HVPW and the HVNW on a surface of the semiconductor substrate.
17-20. (canceled)
An integrated circuit (IC) comprising:
- a semiconductor substrate having a first high voltage well comprising a first dopant and a second high voltage well comprising a second dopant, wherein the first dopant is opposite the second dopant;
- and
- a high-voltage device on the semiconductor substrate, wherein the high-voltage device comprises an epitaxial source disposed in the first high voltage well, wherein the epitaxial source comprises the second dopant, an epitaxial drain disposed in the second high voltage well, wherein the epitaxial drain comprises the second dopant, wherein a top surface of the epitaxial source and a top surface of the epitaxial drain extend above a top surface of the substrate, a gate arranged between the first high voltage well and the second high voltage well on a surface of the semiconductor substrate, and wherein the top surface of the epitaxial source and the top surface of the epitaxial drain are above a top surface of the gate.
Dependencies are inferred from the claim text.