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US 2019/0096855 A1Published application
Apparatuses and methods for scalable memory
AssigneeMicron Technology, Inc.
InventorsFeng Lin, Yuanzhong Wan
Life of this patent
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Abstract
Apparatuses and methods are provided for scalable memory. An example apparatus comprises a logic component, a plurality of memory components adjacent to and coupled to one another and the logic component, a plurality of memory component programmable delay lines (PDLs), of the plurality of memory component PDLs associated with a respective one of the plurality of memory components, and a logic component programmable delay line (LPDL) coupled to the logic component and each of the plurality of memory component PDLs.
Claims20
A method, comprising:
- receiving a shared strobe signal and a plurality of strobe select signals to a memory component associated with a memory component stack;
- determining a particular memory component among the stack of memory components to be activated based, at least in part, on the shared strobe signal and the plurality of strobe select signals;
- and
- activating the particular memory component among the stack of memory components in response to the determination that the particular memory component is to be activated.
1 more element
An apparatus, comprising:
- a stacked memory system, wherein the stacked memory system is configured to:
- receive, by a memory component associated with the stacked memory system, a shared strobe signal and a plurality of strobe select signals;
- determine a particular memory component associated with the stacked memory system to be activated based, at least in part, on the shared strobe signal and the plurality of strobe select signals;
- and
- activate the particular memory in response to the determination that the particular memory component is to be activated.
2 more elements
A system, comprising:
- a logic component coupled to a memory component stack, wherein the logic component is configured to:
- generate a shared strobe signal and a plurality of strobe select signals;
- transfer the shared strobe signal and the plurality of strobe select signals to the memory component stack;
- and
- a memory component stack coupled to the logic component and comprising a plurality of memory components, wherein the memory component stack is configured to:
- determine a particular memory component among the stack of memory components to be activated based, at least in part, on the shared strobe signal and the plurality of strobe select signals;
- and
- activate the particular memory component among the stack of memory components in response to the determination that the particular memory component is to be activated.
5 more elements
Dependencies are inferred from the claim text.