Bump structure, semiconductor package including the bump structure, and method of forming the bump structure
AssigneeSamsung Electronics Co., Ltd.
InventorBO-IN NOH
Life of this patent
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Abstract
A bump structure includes an under bump metal (UBM) layer, a pillar bump and a capping layer. The UBM layer is disposed on a pad of a semiconductor chip. The pillar bump is disposed on the UBM layer. The capping layer is disposed on the UBM layer and surrounds an outer surface of the pillar bump. The capping layer has a height of about 0.5 times to 0.7 times a height of the pillar bump as measured from the UBM layer where an upper portion of the pillar bump is exposed. The capping layer suppresses stresses applied to a metal wiring in the semiconductor chip while attaching the semiconductor chip to a package substrate and maintain an adhesion force between the pillar bump and the package substrate.
Claims20
A bump structure of a semiconductor package, comprising:
- an under bump metal (UBM) layer disposed on a pad of a semiconductor chip;
- a pillar bump disposed on the UBM layer;
- and
- a capping layer disposed on the UMB layer, wherein the capping layer surrounds an outer side surface of the pillar bump and has a height of about 0.5 times to about 0.7 times a height of the pillar bump as measured from the UBM layer wherein an upper portion of the outer side surface of the pillar bump is exposed.
A semiconductor package comprising:
- a package substrate;
- a first semiconductor chip disposed over the package substrate;
- and
- a first bump structure that includes a first under bump metal (UBM) layer disposed on a pad of the first semiconductor chip, a first pillar bump disposed on the first UBM layer and that is electrically connected with the package substrate, and a first capping layer disposed on an edge of the first UBM layer that surrounds the first pillar bump, the first capping layer having a height of about 0.5 times to about 0.7 times a height of the first pillar bump as measured from the first UBM layer wherein an upper portion of an outer side surface of the first pillar bump oriented toward the package substrate is exposed.
A method of forming a bump structure of a semiconductor package, the method comprising:
- forming a under bump metal (UBM) layer on a pad of a semiconductor chip;
- forming a pillar bump on the UBM layer;
- forming a photoresist pattern on the UBM layer, the photoresist pattern having an opening that exposes an outer side surface of the pillar bump and a portion of the UBM layer;
- and
- forming a capping layer in the opening of the photoresist pattern.
Dependencies are inferred from the claim text.