Package structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTzu-Chun Tang, Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang
Life of this patent
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Abstract
A package structure includes a sub-package, a conductive structure, and at least one first antenna. The sub-package includes at least one chip. The conductive structure is bonded onto and electrically connected to the sub-package. The at least one first antenna has a vertical polarization and is electrically connected to the at least one chip, wherein the at least one first antenna is partially located in the sub-package, and the at least one first antenna is extended within the sub-package into the conductive structure.
Claims20
A package structure, comprising:
- a sub-package comprising at least one chip;
- a conductive structure bonded onto and electrically connected to the sub-package;
- and
- at least one first antenna having vertical polarization and electrically connected to the at least one chip, wherein the at least one first antenna is partially located in the sub-package, and the at least one first antenna is extended within the sub-package into the conductive structure.
A package structure, comprising:
- a sub-package having at least one chip, comprising first through vias and second through vias electrically connected to the at least one chip;
- a circuit board having metal segments, bonded to and electrically connected to the sub-package, wherein each of the second through vias is overlying and electrically connected to a respective one of the first through vias along a stacking direction of the sub-package and the circuit board;
- and
- a first antenna, extending from the sub-package into the circuit board, wherein the first antenna comprises a pair of two adjacent second through vias, the respective ones of the first through vias, and a portion of the metal segments electrically connected thereto.
A package structure, comprising:
- a sub-package having at least one chip, comprising first through vias and second through vias electrically connected to the at least one chip;
- at least one metal block, bonded to and electrically connected to the sub-package, wherein each of the second through vias is overlying and electrically connected to a respective one of the first through vias along a stacking direction of the sub-package and the at least one metal block;
- and
- a first antenna, comprising a pair of two adjacent second through vias, the respective ones of the first through vias, and the at least one metal block electrically connected thereto, wherein a dimension of the first antenna is greater than a dimension of the at least one chip as measured along a stacking direction of the sub-package and the at least one metal block.
Dependencies are inferred from the claim text.