Very Thin Embedded Trace Substrate-System in Package (SIP)

A system in package comprising:

• a substrate comprising:
• an inner pre-impregnated material layer;
• at least three metal redistribution layers within said impregnated material;
• and
• a solder mask material on top and bottom of said pre-impregnated material;
• at least one passive component mounted in openings through said solder mask material to said metal redistribution layers on one side of said substrate and embedded in a first molding compound;
• at least one silicon die mounted in an opening through said solder mask material to said metal redistribution layers on an opposite side of said substrate and embedded in a second molding compound wherein electrical connections are made between said at least one silicon die and said at least one passive component through said metal redistribution layers;
• and
• solder balls mounted through openings in said second molding compound and said solder material to said metal redistribution layers wherein said solder balls provide package output.