Semiconductor package and method of manufacturing the same
AssigneeAdvanced Semiconductor Engineering, Inc.
InventorsSheng-Ming WANG, Tien-Szu CHEN, Wen-Chih SHEN, Hsing-Wen LEE, Hsiang-Ming FENG
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AssigneeAdvanced Semiconductor Engineering, Inc.
InventorsSheng-Ming WANG, Tien-Szu CHEN, Wen-Chih SHEN, Hsing-Wen LEE, Hsiang-Ming FENG
Estimating the term…
The present disclosure provides a semiconductor substrate, including a first dielectric layer with a first surface and a second surface, a first conductive via extending between the first surface and the second surface, a first patterned conductive layer on the first surface, and a second patterned conductive layer on the second surface. The first conductive via includes a bottom pattern on the first surface and a second patterned conductive layer on the second surface. The bottom pattern has at least two geometric centers corresponding to at least two geometric patterns, respectively, and a distance between one geometric center and an intersection of the two geometrical patterns is a geometric radius. A distance between the at least two geometric centers is greater than 1.4 times the geometric radius. A method for manufacturing the semiconductor substrate described herein and a semiconductor package structure having the semiconductor substrate are also provided.
A semiconductor substrate, comprising:
A method for manufacturing a semiconductor substrate, comprising:
Dependencies are inferred from the claim text.