Method of fabricating integrated circuit having staggered conductive features
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsFong-Yuan Chang, Sheng-Hsiung Chen, Po-Hsiang Huang, Jyun-Hao Chang, Chun-Chen Chen
Life of this patent
Estimating the term…
Abstract
A method includes using a processor to placing a cell having a first conductive feature and a second conductive feature on an integrated circuit layout. A length of the first conductive feature is extended, by using the processor, to form a staggered configuration. A set of instructions for manufacturing an integrated circuit based upon the integrated circuit layout is generated, and the set of instructions is stored in a non-transitory machine readable storage medium.
Claims20
A method, comprising:
- using a processor, placing a cell having a first conductive feature and a second conductive feature on an integrated circuit layout;
- using the processor, extending a length of the first conductive feature to form a staggered configuration;
- generating a set of instructions for manufacturing an integrated circuit based upon the integrated circuit layout;
- and
- storing the set of instructions in a non-transitory machine readable storage medium.
A method, comprising:
- using a processor, placing a cell having a first conductive feature and a second conductive feature on an integrated circuit layout;
- using the processor, shrinking lengths of the first conductive feature and the second conductive feature;
- using the processor, configuring the first conductive feature, such that a first edge of the first conductive feature is not aligned with a first edge of the second conductive feature;
- and
- fabricating an integrated circuit based on the integrated circuit layout.
A method, comprising:
- using a processor, placing a cell having a first conductive feature and a second conductive feature on an integrated circuit layout;
- using the processor, configuring the first conductive feature, such that the first conductive feature is across a first edge of the cell;
- and
- generating a set of instructions for manufacturing an integrated circuit based upon the integrated circuit layout;
- and
- storing the set of instructions in a non-transitory machine readable storage medium.
Dependencies are inferred from the claim text.