Semiconductor device with interconnecting structure and method for manufacturing the same

A method for manufacturing a semiconductor device, the method comprising:

• providing a substrate comprising at least one conductive layer, wherein a top surface of the at least one conductive layer has a first portion and a second portion;
• forming a first dielectric layer on the substrate and said first portion of the top surface of the at least one conductive layer;
• forming a via in the first dielectric layer on said second portion of the top surface of the at least one conductive layer;
• forming a first capping layer on a top surface of the via;
• forming a line on the first capping layer and a portion of the first dielectric layer;
• and
• forming a second capping layer on a top surface of the line to peripherally enclose a side surface of the line, wherein each of the first capping layer and the second capping layer has an etch selectivity with respect to the line and the second capping layer peripherally encloses the first capping layer.

A method, comprising:

• forming a conductive layer through a first dielectric layer;
• forming a second dielectric layer over the first dielectric layer;
• forming a via in the second dielectric layer and over the conductive layer;
• forming a metal line over the via;
• and
• forming a first graphene layer that wraps around the metal line and that is in contact with a top surface of the second dielectric layer.

A method, comprising:

• forming a via hole through a first dielectric layer to expose a conductive layer;
• forming a metal via in the via hole and over the conductive layer;
• forming a first graphene layer over the metal via;
• forming a metal layer over the first graphene layer;
• and
• etching the metal layer to form a metal line over the first graphene layer, wherein etching the metal layer is performed such that a sidewall of the metal line is exposed.