Method of creating aligned vias in ultra-high density integrated circuits

A processing system for processing a substrate and forming vias aligned with metal lines in an integrated circuit, wherein the processing system comprises:

• a processor;
• a memory;
• and
• one or more applications stored in the memory and including instructions, which are executable by the processor to
• form a stack including a first plurality of layers, wherein the first plurality of layers comprise a dielectric layer, a capped layer, a hard mask layer, a first film layer, and a first photoresist layer,
• pattern the first photoresist layer to provide metal line masks,
• etch the hard mask layer based on the patterned first photoresist layer to form metal line masks in the hard mask layer,
• ash the first photoresist layer and the first film layer,
• form a second plurality of layers on the hard mask layer, wherein the second plurality of layers include a second film layer and a second photoresist layer,
• pattern the second photoresist layer to form via masks, wherein the via masks extend across opposing sides of the metal line masks,
• etch the second film layer and the capped layer based on the patterned second photoresist layer,
• ash the second photoresist layer and the second film layer,
• etch the dielectric layer and the capped layer based on a pattern of the hard mask layer to provide a plurality of via regions and a plurality of metal line regions,
• etch the hard mask layer and the capped layer, and
• perform a plurality of dual damascene process operations to form the vias and the metal lines in the plurality of via regions and the plurality of metal line regions.