Memory mapping
AssigneeIntel Corporation
InventorsRobert A. Branch, Murugasamy K. Nachimuthu, Sundar Muthusamy
Life of this patent
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Abstract
Technology for a system is described. The system can include one or more processors. The system can include a memory associated with the one or more processors. The system can include a memory controller comprising logic to create a reserved memory region in a system physical address (SPA) map. The memory controller can comprise logic to detect when the one or more processors are brought online. The memory controller can comprise logic to map the memory associated with the one or more processors that are brought online to the reserved memory region in the SPA map.
Claims20
An apparatus, comprising:
- one or more processors;
- a memory associated with the one or more processors;
- a memory controller comprising logic to:
- create a reserved memory region in a system physical address (SPA) map;
- detect when the one or more processors are brought online;
- and
- map the memory associated with the one or more processors that are brought online to the reserved memory region in the SPA map.
A data storage system operable to perform memory mapping, the data storage system comprising:
- one or more processors;
- a memory associated with the one or more processors;
- a memory controller comprising logic to:
- create a reserved memory region in a system physical address (SPA) map, wherein the reserved memory region in the SPA map includes non-existent memory (NXM);
- detect when the one or more processors are brought online;
- and
- map the memory associated with the one or more processors that are brought online to the reserved memory region in the SPA map, wherein the SPA map enables the memory to be accessible through one or more memory address decoders in the data storage system.
Dependencies are inferred from the claim text.