Non-volatile memory device and storage device including the same

A non-volatile memory device comprising:

• at least one memory cell array;
• a plurality of page buffer circuits connected to the at least one memory cell array through a plurality of bit lines;
• and
• an output buffer circuit connected to the plurality of page buffer circuits and including at least one pipeline output stage,
• wherein the at least one pipeline output stage comprises a hybrid pipeline output stage including a First In, First Out (FIFO) memory and a serial pipeline structure.

A storage device comprising:

• at least one non-volatile memory device comprising:
• a First In, First Out (FIFO) memory configured to receive data sequentially transmitted through a data path having a wave pipeline structure and to output data sequentially;
• and
• a serial pipeline structure configured to advance a phase of the output data and output the phase-advanced output data;
• and
• a memory controller configured to determine whether to control the at least one non-volatile memory device in a high-speed operating mode that operates faster than a low-speed operating mode,
• wherein the memory controller is configured to adjust a latency for operating the at least one non-volatile memory device in the high-speed operating mode.