Voltage reference computations for memory decision feedback equalizers
AssigneeMicron Technology, Inc.
InventorsJennifer E. Taylor, Raghukiran Sreeramaneni
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Abstract
A device includes a combinational circuit configured to create a one or more distortion correction factors used offset inter-symbol interference from a data stream on a distorted bit. The device also includes a selection circuit coupled to the combinational circuit. The selection circuit includes a feedback pin configured to receive a control signal and an output, wherein the selection circuit is configured to select a first distortion correction factor of the one or more distortion correction factors based upon the control signal and transmit the first distortion correction factor from the output.
Claims20
A device, comprising:
- a voltage reference generator configured to produce one or more distortion correction factors;
- and
- a selection circuit configured to:
- receive the one or more distortion correction factors from the voltage reference generator;
- select a distortion correction factor of the one or more distortion correction factors as a selected distortion correction factor;
- and
- transmit the selected distortion correction factor such that the selected distortion correction factor is used to offset an interference associated with a data stream on a distorted bit.
A device, comprising:
- a latching element having:
- a first input configured to receive a selected distortion correction factor;
- and
- a second input configured to receive a distorted bit, wherein the distorted bit has been distorted based at least in part on an interference associated with one or more previously transmitted bits of a data stream;
- a first output configured to transmit a control signal based at least in part on the one or more previously transmitted bits, wherein the control signal is utilized to select the selected distortion correction factor;
- and
- a second output configured to transmit a corrected bit by combining the selected distortion correction factor with the distorted bit.
A method, comprising:
- transmitting a selected distortion correction factor to a latching element;
- transmitting a distorted bit to the latching element;
- and
- generating, via the latching element, a modified value of the distorted bit based at least in part on the selected distortion correction factor and the distorted bit.
Dependencies are inferred from the claim text.