System and method for application specific integrated circuit design

An application specific integrated circuit (ASIC) chip comprising:

• multiple components;
• multiple interfaces corresponding to the multiple components and configured to utilize respective communication protocols between pairs of components of the multiple components;
• multiple communications links connecting the multiple interfaces based on the respective communication protocols;
• and
• at least one gasket inserted between two or more interfaces of the multiple interfaces, the at least one gasket configured to provide control of timing requirements of a respective communications link connecting the two or more interfaces, wherein insertion of the at least one gasket is based on identifying the respective communication protocol utilized by the two or more interfaces and determining timing estimates between the components of the multiple components corresponding to two or more interfaces,
• wherein the respective communications link utilizes a communication protocol method comprising:
• using delay insensitive (DI) codes to encode information to be communicated between the components of the multiple components corresponding to the two or more interfaces,
• using quasi-delay-insensitive-logic to communicate the encoded information between the components of the multiple components corresponding to the two or more interfaces,
• using temporal compression between the components of the multiple components corresponding to the two or more interfaces, and
• using signals to indicate availability and readiness of information to be communicated between the components of the multiple components corresponding to the two or more interfaces.

An application specific integrated circuit (ASIC) chip comprising:

• a first intellectual property (IP) block and a second IP block;
• a first interface and a second interface configured to utilize a communication protocol between the first and second IP blocks;
• a communications link connecting the first and second interfaces based on the communication protocol;
• and
• at least one gasket inserted between the first and second interfaces and configured to provide control of timing requirements of the communications, the at least one gasket is inserted based on identifying the communication protocol and determining timing estimates between the first and second IP blocks,
• wherein the communications link utilizes a communication protocol method comprising:
• using delay insensitive (DI) codes to encode information to be communicated between the first and second IP block,
• using quasi-delay-insensitive-logic to communicate the encoded information between the first and second IP block,
• using temporal compression between the first and second IP block, and
• using signals to indicate availability and readiness of information to be communicated between the first and second IP block.