Memory system and handles to master capabilities
AssigneeHewlett Packard Enterprise Development LP
InventorsDejan S. Milojicic, Moritz Josef Hoffmann, Alexander Richardson, Qiong Cai
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Abstract
In one example, a processor sends a memory access request including a data capability and a handle which references a master capability. In response to receiving the memory access request, a memory controller checks whether the handle references a valid master capability and checks whether the data capability is within a scope of the master capability. In response to determining that the master capability is valid and the data capability is within the scope of the master capability, the memory controller returns a result of the memory access request to the processor.
Claims20
A method of accessing persistent memory in a capability based memory system, the method comprising:
- a processor sending a memory access request to a memory controller of the persistent memory, the memory access request including a data capability for a first range of memory addresses and a handle which references a master capability stored in a second range of memory addresses;
- in response to receiving the memory access request, the memory controller checking whether the handle references a valid master capability and checking whether the data capability is within a scope of the master capability;
- and
- in response to determining that the master capability is valid and the data capability is within the scope of the master capability, the memory controller returning a result of the memory access request to the processor.
A system comprising:
- a first memory to store a data capability for a first range of memory addresses and a handle which references a master capability stored in a second range of memory addresses;
- a second memory including said first range of memory addresses and said second range of memory addresses;
- and
- a processor to read the data capability and the handle from the first memory and send a memory access request including the data capability and the handle to a memory controller of the second memory,
- wherein the memory controller is to check whether the handle references a valid master capability and check whether the first range of memory addresses of the data capability is included within a third range of addresses which the master capability provides access rights for, and in response to determining that the handle references a valid master capability and that the first range of memory addresses is within the third range of memory addresses, return a result of the memory access request to the processor.
A non-transitory machine readable storage medium storing instructions which are executable by a processing resource to:
- receive a request to allocate a first range of memory addresses in persistent memory to an application;
- in response to said request, generate a master capability for the first range of memory addresses and store the master capability in a second range of memory addresses in the persistent memory;
- provide the application with a data capability which points to the first range of memory addresses and a handle which points to the master capability in the second range of memory addresses;
- allow the application to access the first range of memory addresses in response to the application sending a request including the data capability together with the handle;
- receive a de-allocation request to de-allocate the first range of memory addresses;
- and
- in response to receiving the de-allocation request, revoke the master capability.
The storage medium of claim 20, including instructions to generate a modified copy of the data capability with a reduced range of memory addresses or a reduced set of permissions and associate the modified copy of the data capability with a copy of the handle to the master capability.
Dependencies are inferred from the claim text.