Devices and methods for secured processors
AssigneeSecure-Ic SAS
InventorsMichaël TIMBERT, Sylvain GUILLEY, Adrien FACON
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AssigneeSecure-Ic SAS
InventorsMichaël TIMBERT, Sylvain GUILLEY, Adrien FACON
Estimating the term…
Embodiments of the invention provide a computing device comprising one or more processors, each processor comprising one or more processing unit, said one or more processing units being configured to execute at least one program, each program comprising data and/or instructions, the computing device further comprising, for at least some of the processors, a processor cache associated with each processor, the processor cache being configured to access data and/or instructions comprised in the programs executed by the processor, the computing device comprising: an auxiliary cache configured to access metadata associated with the data and/or instructions comprised in said programs; a security verification unit configured to retrieve, from the auxiliary cache, at least a part of the metadata associated with data and/or instructions corresponding to a memory access request sent by a processor (11) to the processor cache (117).
A computing device comprising one or more processors, each processor comprising one or more processing unit, said one or more processing units being configured to execute at least one program, each program comprising data and/or instructions, the computing device further comprising, for at least some of the processors, a processor cache associated with each processor,
A method for executing computing programs, each computing program comprising data and/or instructions, the method comprising storing the data and/or instructions comprised in the executed computing programs being executed and the metadata associated with said data and/or instructions, wherein the method comprises:
Dependencies are inferred from the claim text.