Semiconductor device and memory access method

A semiconductor device comprising:

• an arithmetic circuit configured to access compressed data and auxiliary information required to access the compressed data;
• a management unit memory space determination circuit;
• and
• an auxiliary information address generation circuit configured to calculate an address of the auxiliary information, wherein on a memory space where the compressed data and the auxiliary information are stored, at least one management unit memory space including a plurality of pieces of the compressed data and at least one auxiliary information storage area including a plurality of pieces of auxiliary information required to access the pieces of the compressed data are set,
• wherein the management unit memory space determination circuit receives an access address to a first compressed data, which is one of the pieces of the compressed data, from the arithmetic circuit and determines in which management unit memory space the access address is stored,
• wherein the auxiliary information address generation circuit generates a first auxiliary information address, which is an address where first auxiliary information corresponding to the first compressed data is stored, from a determination result of the management unit memory space determination circuit and the access address to the first compressed data, and
• wherein the arithmetic circuit performs access to the first compressed data by using the generated first auxiliary information address.