Systems and methods securing an autonomous device

A method that cryptographically secures components of a printed circuit board assembly of a device, the method comprising:

• manufacturing a printed circuit board assembly comprising:
• a main central processing circuit,
• a cryptographic processing circuit, and
• a physically secured cryptographic key store;
• at a time of manufacturing the printed circuit board assembly, using a first provisioning computer to:
• [1] provision the main central processing circuit with resident firmware;
• and
• [2] cryptographically sign the resident firmware with a master cryptographic key;
• [3] provision the physically secured cryptographic key store with asymmetric cryptographic key material,
• after provisioning the main central processing circuit and provisioning the physically secured cryptographic key store, establishing a first cryptographically secured communication channel between the main central processing circuit and the cryptographic processing circuit using the asymmetric cryptographic key material,
• wherein the main central processing circuit uses the first cryptographically secured communication channel to control an operation of the cryptographic processing circuit.

A device security method that cryptographically secures a computing components of a device, the device security method comprising:

• implementing a first cryptographic binding step of:
• at a physically secure location, using a master cryptographic key by a first provisioning source recognized by a cryptographic processing circuit to initialize the cryptographic processing circuit by provisioning a cryptographic key store associated with the cryptographic processing circuit of the device with cryptographic key material;
• implementing a second cryptographic binding step:
• establishing a first cryptographically secured pairing between a main central processing unit of the device and the cryptographic processing circuit of the device by exclusively exchanging one or more cryptographic keys between the cryptographic processing circuit and the main central processing unit;
• implementing a third cryptographic binding step:
• establishing a second cryptographically secured pairing between the main central processing unit and resident firmware of the main central processing unit by cryptographically validating by the main central processing unit a cryptographic signature ascribed to the resident firmware;
• and
• implementing a fourth cryptographic binding step:
• generating by the first provisioning source a second master cryptographic key for a second provisioning source based on a master cryptographic key of the first provisioning source.